Imperas’ riscvOVPsim RISC-V reference model and simulator has been updated and extended for RISC-V vector instructions and now supports coverage driven verification analysis. The base version of riscvOVPsim is available for free from a new GitHub site  (github.com/riscv-ovpsim), with an enhanced version including an extensive RISC-V vector test suite also freely availablewith an enhanced version ...

This story continues at riscvOVPsim reference model enhanced for vector instructions

Or just read more coverage at Electronics Weekly