Silicon Labs sampling single-chip 4G/Ethernet clocks

Silicon Labs is sampling a family of  multi-channel jitter attenuating clocks for 4.5G and Ethernet-based Common Public Radio Interface (eCPRI) wireless applications. The Si5381/82/86 clocks  use the company’s DSPLL technology to deliver a timing solution that combines 4G/LTE and Ethernet clocking in a single IC. The clocks eliminate the need for multiple clock devices and ...

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