Author Archives: Caroline Hayes

FPGA-based neural network accelerator outperforms GPUs

Xilinx Developer Forum: Claimed to be the highest performance convolutional neural network (CNN) on an fpga, Omnitek’s CNN is available now. The deep learning processing unit (DPU) is future-proofed, explained CEO Roger Fawcett, due to the programmability of the fpga. It was demonstrated as a GoogLeNet Inception-v1 CNN, using eight-bit integer resolution. It achieved 16.8 ...

This story continues at FPGA-based neural network accelerator outperforms GPUs

Or just read more coverage at Electronics Weekly

Lynx demos separation security for AI

Xilinx Developer Forum, California: Lynx Software Technologies demonstrated secure separation in designs of mixed critical functionality systems, with a robotic control system for industrial machine learning (ML) and industrial IoT applications. Based on Xilinx’s Zynq UltraScale+, the software kernel company was running an operator workstation, a robotic controller and real-time robotic control and inspection system, ...

This story continues at Lynx demos separation security for AI

Or just read more coverage at Electronics Weekly

Accelerator cards exploit fpga technology to boost server performance

Xilinx Developer Forum, California: Two accelerator cards, the Alveo U200 and Alveo U250, (www.xilinx.com/250) announced by Xilinx, improve latency rates to accelerate real-time machine learning inference, video processing, genomix and data analytics. Both are based on a customise 16nm UltraScale+ fpga and therefore can be reconfigured to accommodate new algorithms and standard or shifts in ...

This story continues at Accelerator cards exploit fpga technology to boost server performance

Or just read more coverage at Electronics Weekly

Arm adds fpga option and new business model to DesignStart

Xilinx Developer Forum, California: Arm Cortex-M1 and Cortex-M3 cores have been added to the DesignStart portfolio in a collaboration with Xilinx to bring instant and license-free access to developers. The announcement in San Jose is an extension of the DesignStart development portal and also marks a change in the business mode. Phil Burr, Director of ...

This story continues at Arm adds fpga option and new business model to DesignStart

Or just read more coverage at Electronics Weekly

DVCon Europe leads with the digital twin and IoT development

Siemens PLM Software and STMicroelectronics will present keynotes at next month’s DVCon Europe 2018. The event for chip architects, design verification engineers and IP integrators is sponsored by Accellera Systems Initiative. This year’s keynotes reflect the design and verification methodologies and standards for the IoT, machine learning, and automotive safety. On the first day of ...

This story continues at DVCon Europe leads with the digital twin and IoT development

Or just read more coverage at Electronics Weekly

Mentor automates photonic layout and updates in minutes

  Photonic sensors are increasingly being used in healthcare, lidar for autonomous vehicles, high performance computing (HPC) and networking, yet layout design is typically slow. Mentor, a Siemens business, aims to reduce development time with the introduction of the LightSuite Phototonic Compiler. The automated layout tool is a unlike any other Mentor tool, said Tom ...

This story continues at Mentor automates photonic layout and updates in minutes

Or just read more coverage at Electronics Weekly

ASIC asserts rights to ML chip market

According to a report published by Allied Market Research, application specific integrated circuits (ASICs) will dominate the machine learning (ML) chip market. The Machine Learning Chip Market report forecasts the global ML chip market will be worth $37.8 billion in 2025, demonstrating a compound annual growth rate (CAGR) of 40.8% between 2018 and 2025. The ...

This story continues at ASIC asserts rights to ML chip market

Or just read more coverage at Electronics Weekly

Arm discloses two-year roadmap for CPUs

Breaking with tradition, Arm has announced a roadmap for its client CPUs, and plans for a new CPU later this year and the company’s plans to meet the demands of 5G and always-connected devices. Following the release of Cortex-A76 in May this year, Arm will deliver a CPU, codenamed Deimos to partners later this year, ...

This story continues at Arm discloses two-year roadmap for CPUs

Or just read more coverage at Electronics Weekly

Mouser adds Microchip’s dual-core DSCs for motor control

dual-core digital signal controllers (DSCs) for motor control applications. The  dual-core DSCs combine two dsPIC DSC cores in a single chip, with optional support for the control area network flexible data rate (CAN-FD) protocol. The communications characteristics with increased bandwidth make the DSCs suitable for embedded applications with algorithms, such as  motor control, server power supplies, automotive sensors, industrial ...

This story continues at Mouser adds Microchip’s dual-core DSCs for motor control

Or just read more coverage at Electronics Weekly