At DAC, French embedded FPGA (eFPGA) supplier, Menta, introduced what it claims is the first eFPGA soft IP. It  enables designers to perform closure directly at the top level. This is significant for AI, as well as space and defence projects, which rely on low latency, explained Yoan Dupret, Menta’s managing director and CEO.   ...

This story continues at eFPGA soft IP provides options for SoC and ASIC designs

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