ARM sponsors Science Museum comms gallery

arm-scienceARM is sponsoring Information Age a new gallery to be opened at the Science Museum on 25 October.

Using interactive displays and experiences, the gallery will reveal personal stories about how life has been transformed by communication innovations over the last two centuries.

Information Age will be divided into six zones, each representing a different information and communication technology network; The Cable, The Telephone Exchange, Broadcast, The Constellation, The Cell and The Web.

The gallery will explore the important events which shaped the development of these networks, from the dramatic stories behind the growth of the worldwide telegraph network in the 19th century, to the influence of mobile phones on our lives today.

Re-live remarkable moments in history, told through the eyes of those who invented, operated or were affected by the new wave of technology, from the first BBC radio broadcast in 1922 to the dawn of digital TV.

Discover how wireless technology enabled lives to be saved and news of the Titanic disaster to be spread to the world within hours of the event, and hear the personal stories of the operators who worked on the Enfield Telephone Exchange, the last manual exchange which marked the end of an era in communication history.


david manners

IDC wire termination gets tough

 samtecSamtec has introduced a 2.00 mm pitch discrete wire IDC system designed to simplify and strengthen discrete wire termination in field applications.

The discrete wire IDC system includes a cable socket, our I2SS Series, and a mating board level header, our T2I Series.

The cable component is available in 2, 3, 4 or 5 positions and accepts 24 AWG discrete wire cables, which are held in place by the contacts and then terminated with standard flat jaw pliers.

The board level connector is a single row configuration with through-hole termination for increased stability on the board. In addition, a single end latching system is standard for secure locking. The shrouded and polarised system is RoHS compliant and lead-free solderable.

This system will bring the benefits of assembly without special tooling to field applications such as installation, testing and maintenance.



richard wilson

Manufacturer buys M2M firm to target IoT business

(L-R): Tony McFadden, Director at United, Charlie Peppiatt, CEO Stadium, Joanne Estell Finance Director, Stadium and Craig Helm, Director at United

(L-R): Tony McFadden, Director at United, Charlie Peppiatt, CEO Stadium, Joanne Estell Finance Director, Stadium and Craig Helm, Director at United

Stadium Group  has acquired a manufacturer which specialises in M2M wireless devices for use over cellular networks.

The Cheshire-based company, United Wireless operates in the automotive and telematics sectors. It employs 40 people.

Stadium said it has a strategy to add complementary products, design capability and global supply chain management.

Stadium already provdies PCB assembly and box build, power supplies, battery chargers and back‐up supplies, intelligent interface and display systems.

M2M is seen as a high growth market by the UK-based manufacturer.

“Global demand for M2M wireless devices is forecast to expand at a 24% compound annual growth rate over the next 5 years, with the number of cellular M2M device subscribers to rise to 490 million by 2018. This acquisition adds a new dimension to our product portfolio, complements our existing group companies and will allow us to engage with the rapid development of the Internet of Things,” said  Charlie Peppiatt, CEO of Stadium.

“Our strategy will be achieved by expanding our offering in products and technologies that complement the existing iEMS, Power Products and Interface & Displays businesses, offering ‘adjacent products’ to widen the business opportunity with each individual customer. A key fourth cornerstone to this strategy has been a focus to expand into the M2M wireless devices space where there is a huge growth potential.”

United will trade under the new name of Stadium United Wireless.



richard wilson

Does off really mean off in a smart meter?

smart-meter-relayReduction in energy use is high on the agenda of customers, who have to pay for wasted energy, utilities which need to keep pace with growing energy consumption, and of governments, who have to handle the macro-effects of global warning.

Whether the need is to effectively control new lighting technologies, to fully power down systems on standby, or to protect smart meters against illegal tampering, relays and switches are playing a central role in making the next generation of electronic and electrical systems energy efficient and make a real contribution to the overall reduction of energy use.

Switch and relay manufacturers are responding to these needs. For example, new latching relays are designed to help save energy in lighting control systems. New switches can be remotely controlled, allowing a system to be fully isolated automatically if required. Tamper proof switches, DC power relays and other designs are also coming on the market to support the new wave of eco-friendly electronics and energy saving systems.

Latching relays

Lighting technologies such as fluorescent and LED lamps are much more efficient, but energy can still be wasted if they are not switched off when the room is unoccupied.

Users can’t be relied on to do this, and automatic control systems are becoming commonplace and sometimes even mandatory. These systems rely on a switch or relay to actually effect the switching, but these have to cope with the high inrush currents associated with the starter capacitors in fluorescent lights and LED driver circuits.

Latching relays that are only energised while switching and use less power than non-latching designs are by far the best and most efficient approach. Two new energy saving latching relays from Omron feature the capacity to handle these high inrush currents.

Latching relays are also central to smart meter design, to implement the remote disconnect function required for load management, time of day (ToD) tariff-switching, disconnect and pre-payment. To achieve low overall meter power consumption a bi-stable latching relay design with the highest electrical performance is desirable. This is a very specialist application, with very specific requirements. Considerations include small overall size to minimise the size of the meter and resistance to tampering using an external magnet.

Latching relays are also suitable for movement control, smart meter, power line switching and sub metering applications.

Remote reset switches

One of the key goals of the Eco-Design Directive is to limit, and eventually eliminate, standby power. Electromechanical switches can completely power down a system, but until now a limitation has been that they need to be manually actuated.

Remote reset switches provide a great solution, drawing no power until they are activated and therefore are helpful in implementing systems that eliminate standby power and meet the European Commission ErP Ecodesign directive.

Versions of these switches can also address the issue that some systems need to follow a set shut-down sequence to avoid loss of data or circuit damage. For example, capacitors may need to be discharged before a system can be regarded as safely switched off.

To address this, remote reset switches with a delayed off function are available to allow safe shut down of electrical equipment. With such switches, the power to the system is maintained when the switch is returned to the off position. The system is then powered down by an external signal after an interval determined by the designer.

These remote switches are suitable for a range of industrial and consumer electrical applications and even support high inrush currents to TV-8 standards.

Tamper proof switches

Remote reset switches is just one example of the way in which switch design is evolving to address new requirements. For example, an issue with smart meters, industrial control systems and other applications is tamper detection.

A switch is commonly used to detect when the cover of a system has been opened. Smart meter anti-tamper switches may not be actuated for years, but should still operate reliably should the meter be attacked after this period.

Switches for this application, such as the Omron D2FS sub-miniature snap-action switch, are designed to support long term operation even with very low switching frequencies. This switch incorporates a single-leaf movable spring and an edge shaped fixed contact, which exerts a high contact force per square metre and aids wiping movement keeping the contact surface clean.

It is a challenge for electronic designers to ensure that off really does mean off for the systems that they design. The Eco-design directive puts regulatory force behind this need, but truthfully customers are increasingly aware of the cost of energy, and leaving a system powered when not in use can affect its safety and service life too. Human users cannot usually be relied on to turn off equipment when it isn’t required, and some form of automation is required.

Switches and relays are inherently energy efficient as they will fully disconnect a system or sub-system from its power supply, so that it is properly powered down when not in use.

New products designs use less energy in themselves and are easier to actuate through software. These switches and relays can make a real contribution to creating a new generation of systems that are more efficient, cost less, are more reliable, and at the same time meet or exceed the requirements laid down in EU and other directives.

Andries de Bruin is European product marketing manager, Omron Electronic Components Europe.


richard wilson

NMI conference to discuss lean manufacturing

LEAN-MfgNMI, the UK’s microelectronics industry association, will hold its annual manufacturing conference at the University of Warwick on October 1st.

NMI is very keen on the concepts of ‘lean’ manufacturing and the conference programme has four themed sessions:

  • Lean 2020: Visions for Lean in the future
  • Lean Leadership: The role of the leader in delivering Lean
  • Lean in Action: Case examples of successful implementation
  • Lean Beyond Production: Case examples of how the principles of LEAN can be applied to other parts of the organisation

A keynote speaker will be Jason Speedy, head of manufacturing for Siemens at its Congleton plant. He will highlight the importance of leadership and staff development.

Places at the conference are free to NMI members and just £125 for non-members.

David Law, Director of Manufacturing Services at NMI said:

“The manufacturing excellence conference has grown each year and just gets better and better. It has become a key event for our manufacturing members where everyone benefits from participating and learning from each other. This is a tangible benefit we see week in, week out through our regular ‘action-orientated’ activities. It is therefore exciting to bring an extended manufacturing community together in this way. We believe that manufacturing has a bright future in the UK when we play to our strengths – a position that is bettered by working together wherever possible. We’re delighted to provide such a forum for that collaboration to happen and invite both members and non-members to the conference.”



richard wilson

Intel’s rectangular fin is “almost a miracle”, says Asenov

Intel’s 14nm process has done something which is “almost a miracle – extremely impressive,” says Professor Asen Asenov, Professor of Electrical Engineering at Glasgow University  and CEO of  statistical analysis specialist Gold Standard Simulations (GSS).

What impresses Asenov about what Intel has done with its 14nm process is Intel’s  fabrication of a rectangular fin.

“The fabrication is extremely good,” says Asenov, “I was initially disappointed by the Intel 22nm process but, seeing what they’ve done at 14nm, they’ve done a very good job on the fin.”

Two years ago Asenov was the first to point out t that the trapezoidal shape of the Intel 22nm FinFETs is suboptimal and results in stronger short channel effects and in up  to 15% reduction in current compared to an ‘ideal’ rectangular FinFETs.

“First, rectangular gives you better electrostatic control and better short channel effects – it gives stronger sensitivity to channel effect variations,” explains Asenov, “the  second thing is how much current can flow through the transistor. The current flow through the top of the transistor is not as  high, in a trapezoidal fin,  as you would want.”

“It would appear that Intel is a fast learner,” says Asenov. Intel has seen the force of  Asenov’s argument and gone for a rectangular fin at 14nm. “I think we may be able to claim some credit for that,” says Asenov.

As a result of the rectangular shape the drive current can, theoretically, be increased.

“It’s very difficult to increase the height of the fin and keep the rectangular shape,” says Asenov, “simultaneously they’ve increased the height of the fin and the reduction of the pitch gives a 1.7x improvement in the drive current.”

“But,” adds Asenov, “ in these small devices the drive current depends on the contact resistance . So the potential benefit is 1.7x but, if the contact resistance remains the same, the benefit will be small – it may drop to 1.2x or further.”

“The range of expectation could be very good – 1.5x to 1.7x,” adds Asenov, “or it could go back to the same performance as in the previous technology.”

The trouble is we don’t know.

“Intel hasn’t published too much data on the performance of these devices,” says Asenov.

There is another problem with the 14nm process – the SRAM doesn’t scale.

“With Intel’s finfet process, SRAM is very difficult to scale,” observes Asenov, “one of the most unattractive aspects of Intel’s 14nm is that they don’t have proper scaling of SRAM. With finfets the scaling of SRAM is difficult but ST is introducing 14nm SOI almost at the same time as 14nm finfet – and when FD-SOI is introduced at 14nm you can get back to the scaling of SRAM which reduces the cost of the chip.”

“14nm FD-SOI will be 40% cheaper than 14nm finfet,” reckons Asenov.

Asenov is clearly relishing the battle as different technologies fight for supremacy. “I’m glad we’re living in such a very dynamic time – it gives so many opportunities,” he says.

Two such opportunities  which have come the way of GSS recently are last November’s licensing of its statistical analysis tools to TSMC and last July’s licensing of tools to Globalfoundries.

On the GSS web-site a post looks at the situation in more detail.

First it cites a report on the achievement of the rectangular fin:


Evolution of the Intel FinFETs from 22nm to 14 nm technology

From a first glance the reduced fin pitch and increased fin height suggest more than 1.7x improvement of the drive current. However the drive current will be strongly affected by the contact resistance and the extrinsic access resistance, both of which are expected to increase with the scaling of the pitch.

GSS has recently simulated very similar rectangular shape FinFETs and the results are published in [1]. The table below compares the geometry of the 14nm Intel FinFETs with the devices simulated in the above paper.

Intel 14nm FinFETs FinFETs in [1]
Fin Pich


40 nm

Fin Height


44 nm

Gate pitch



Based on the GSS predictive Ensemble Monte Carlo simulations in [1] illustrated below the ‘intrinsic’ pFinFET drive current of the transistors simulated in the paper can be more than 1.6 mA/mm; Vdd=0.75V. This is based on the assumption that 1.5 GP compressive strain can be introduced in the channel of the simulated transistors by suitable source/drain engineering. The velocity overshoot associated with the non-equilibrium velocity in the channel and the related high degree of ballisticity plays significant role in achieving such performance.


Strained Si pFinFET performance obtained form EMC, (b) Strain Si pFinFET carrier velocity. In the two graphs results of the EMC simulations are compared with results of ‘standard’ TCAD drift diffusion simulations before and after calibration.

However, the Ensemble Monte Carlo simulations do not include the contact and additional access resistances. If an access resistance of 1K ohm is included in the calibrated drift diffusion simulations the drive current drops from 1.6 mA/m to 1.2 mA/mm. Access resistance of 2K ohm can reduce the drive current to 1.0 mA/mm.

More details about the role of quantum effects, non-equilibrium transport, variability and reliability of the above FinFETs can be found in [1], which can be downloaded from the GSS web page at:


david manners

Plessey inks distie deal with Solid State Supplies

Plessey High Brightness LEDs - MAGIC

Plessey High Brightness LEDs – MAGIC

Plessey has entered into a distribution agreement with Solid State Supplies of Redditch to expand its European network with coverage in the UK and Ireland market for its GaN-on-Si LED products.

“Plessey’s GaN-on-Si technology looks set to cause major disruption in the LED lighting market,” says John Macmichael of SSS, “our in-house lighting division is already geared up to support lighting and luminaire designers with these new LEDs.”

“Plessey is very pleased to join forces with a distributor that has a focused lighting division already up and running, helping the significant number of lighting and luminaire makers in the UK,” says Plessey’s regional sales director David Owen, “Solid State Supplies has a strong portfolio of products to support the lighting eco system which is now enhanced by the addition of the Plessey GaN-on-Si LED product range. This will accelerate the time to market for Plessey LEDs in this region.”

Plessey’s MaGIC,(Manufactured on GaN-on-Si I/C) High Brightness LED (HBLED) technology has cut the cost of LED lighting by using standard silicon manufacturing techniques.

david manners

What’s new about 14nm processors for Intel?

Broadwell 14nm wafer

Broadwell 14nm wafer

Intel may have grabbed the headlines with the announcement that its first 14nm processor will be on general release next year.

But by then the Broadwell processor will just one of a number of 14nm chips in production.

Intel has long insisted that its production capability, which it has always invested in to keep at the leading edge, is vital for its own microprocessor business.

It produced its first 14nm device a 16Gbit/s serdes (serialiser/deserialser) in March.

However, Intel now has a foundry business which is competing with the likes of TSMC and Samsung.

So the difference with this latest 14nm process technology node is that for the first time it will be just as important for the chips Intel is making for other companies.

Another difference with the 14nm tri-gate (finfet) process is Intel no longer has an obvious lead in process technology.

Other foundries are already in production, TSMC at 16nm, or very near production, Samsung and Globalfoundries at 14nm.

TSMC is reported to be in production of chips on its 16nm process and is repaired to be supplying 16nm mobile processors, probably based on Cortex-A57, to Apple.

It was as long ago as April 2013, when ARM and Cadence have announced the first Cortex-A57 processor test chip fabricated on TSMC’s 16nm finfet manufacturing process technology.

TSMC will possibly skip 14nm node and jump to 10nm with test chips likely to appear next year.

Samsung will be in production of 14nm chips by the end of the year and Globalfoundries is now expected to follow shortly after.

Intel will not only be fabbing its own 14nm chips, for a few years now it has been building foundry business.

Intel’s newest foundry customer for the 14nm process is Panasonic.

Intel’s flagship customer is Altera and the FPGA supplier is using the 14nm process for its Stratix 10 devices which are already in production.

Stratix 10 chips combine four million logic elements and a quad-core 64-bit ARM Cortex-A53 processor.

So when Intel’s first 14nm tri-gate processor, the Core M, available to OEMs in the first half of 2015, it will be just one in a crowd of ARM processor-based chips and other 14nm SoCs being shipped.


richard wilson

Current sensor ICs with internal galvanic isolation

Allegro MicroSystems is offering bidirectional ±5A or unidirectional 10A sensor ICs which have internal galvanic isolation

Designed for AC or DC current sensing for motor control, switched-mode power supplies and solar invertors, the devices have a low-offset, linear Hall sensor circuit with a copper conduction path located near the surface of the die.

Applied current flowing through the copper conduction path generates a magnetic field which is sensed by the integrated Hall device and converted into a proportional voltage. Device accuracy is optimised through the close proximity of the magnetic field to the Hall transducer.


Output voltage versus sensed current

A proportional voltage is provided by the low-offset, chopper-stabilised BiCMOS Hall IC, which is programmed for accuracy after packaging.

The output of the device has a positive slope when an increasing current flows through the primary copper conduction path, which is the path used for current sensing. The internal resistance of this conductive path is typically 0.65mΩ, providing low power loss.

The terminals of the conductive path are electrically isolated from the sensor leads. This allows the ACS722 and ACS723 current sensor ICs to be used in high-side current sense applications without the use of high-side differential amplifiers or other costly isolation techniques.

The devices are certified to 2400 V RMS isolation, and can be used in AC line tied applications.

The two devices are differentiated by the supply voltage: 3.3 V for the ACS722 and 5 V for the ACS723. This means that the ACS723 has higher sensitivity than the ACS722 for the same current range. For example, the ACS723LLCTR-05AB-T has a sensitivity of 400 mV/A as compared with 264 mV/A for the ACS722LLCTR-05AB-T.


richard wilson

Glocal Unichip makes cost-effective, low-power server ASIC

GUC President Jim Lai

GUC President Jim Lai

Global Unichip, TSMC’s design arm, has made a remote management controller ASIC for server and desktop virtualization by adopting the first DDR3/4 PHY targeting TSMC’s 40LP process technology.

“The complexity of today’s server market is absolutely astounding. Performance was once king but today server SoC’s must also provide cost-effective performance. The innovation required to achieve this sweet spot, particularly at a 40nm manufacturing node requires real technical and business creativity and collaboration,” says GUC CEO Jim Lai.

GUC’s DDR 3/4 PHY is the first to be manufactured in 40nm process technology and provides low power, high performance and cost-effectiveness. GUC offers DDR3/4 PHY and controller production-proven turnkey solutions for all of TSMC’s most advanced process nodes including 40nm LP, 28nmHPM and 16nmFF+.

During the design and production process, engineers from both companies faced performance and time-to-market challenges. On the design side, the new device, the ASPEED’s AST2500 server SoC series and AST3200 Desktop Virtualization SoC had to achieve world- class performance on a cost-effective technology.

Key to success was designing to the performance sweet spot of GUC’s DDR3/4 high speed interface IP, a condensed package substrate, and a PCB through a precise DDR system simulation flow and measurement correlation.

The GUC IGADDRS03A DDR3/4 PHY high speed interface IP was implemented with a multiple oxide memory I/O design that capitalized on the combo DDR3 and DDR4 low power and high speed operation. The IP supports user-friendly PHY self training that shortens first system boot up time and reduces engineering resources. The IGADDRS03A integrates with both third party and GUC’s DDR3/DDR4 memory controllers.

“GUC brought in-depth IP, process technology and packaging know-how to the challenge of providing cost-efficient performance to a 40nm SoC. Collaboration was key to leveraging these skills across our two companies’ engineering team,” says ASPEED Technology CEO Chris Lin.

david manners